TSMC Entering CoWoS Technology Market Powering AI and Autonomous Vehicles for Nvidia, Google and Likely Apple
Back in June Apple's CEO Tim Cook confirmed that Project Titan was the "Mother of all AI Projects." It's probably one of the most difficult A.I. projects actually to work on." Now it appears that there may be some help around the corner from Apple supplier TSMC. While the InFo process technology helped TSMC land exclusive deals for Apple's A-series chips for iPhones in 2016 and 2017, and also likely in 2018, the more- advanced CoWoS process technology is also ready to help the company ride high on the wave of AI. Industry observers have said that CoWoS is a critical deployment for TSMC as it will further solidify its leading position in the semiconductor industry in the era of mobile devices, AI, Big Data, machine learning and autonomous vehicles.
Beyond being able to assist Apple on several future projects, TSMC is planning to carry out the first-ever expansion of its CoWoS (Chip on Wafer on Substrate) packaging and testing capacity to fill increasing orders from Nvidia and Google for AI chips, indicating that Taiwan's semiconductor industry is gradually embracing the new era of deep machine learning and AI applications, according to industry sources.
Earlier, the firm's president and co-CEO Mark Liu said that as deep learning has been the largest breakthrough in AI architecture over the past five decades and high-performance computing (HPC) technology has been widely applied, TSMC will utilize HPC technology to lead the development of the semiconductor industry and grab business opportunities associated with forthcoming AI applications.
As Nvidia's largest competitor in AI chips excluding FPGA solutions, Google has released its in house-designed second-generation Tensor Processing Units (TPU2) and has contracted TSMC to carry out wafer foundry services using 16nm process technology, as well as backend packaging and testing.
Nvidia's Tesla P100 in our cover graphic incorporates many new features and technologies, including High Bandwidth Memory 2 (HBM2) and Chip-on-Wafer-on-Substrate (CoWoS) technology.
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