Last Week, TSMC's Executive VP & Co-COO of TSMC, revealed several exciting details about their upcoming 2nm processor technology
Dr. Y.J. Mii, Executive Vice President and Co-COO of TSMC, revealed several exciting details about their upcoming 2nm processor technology at the 70th International Electron Devices Meeting (IEDM) held in San Francisco last week. Considering that this is a chip that Apple will adopt at some point in the future, here are some of the key points that may interest you:
- Performance Boost: The 2nm technology is expected to offer up to a 30% performance increase compared to previous nodes.
- Power Efficiency: It will also provide greater power efficiency, which is crucial for mobile devices and high-performance computing.
- Advanced Techniques: The new technology will utilize nanosheet transistors and 3D integrated circuit technology for improved performance and efficiency.
- AI and HPC Applications: The 2nm processors are designed to power applications in AI, high-performance computing (HPC), and mobile SoCs.
- Future Prospects: TSMC plans to begin mass production of 2nm chips in the second half of 2025.
These advancements underscore TSMC's commitment to pushing the boundaries of semiconductor technology and maintaining its leadership in the industry.
In addition to Dr. Mii’s keynote, TSMC presented 19 papers on topics such as 2nm nanosheet technology, CFET device architecture, alternative channel materials, 3D integrated circuit technology, transition metal dichalcogenides, 2D material device advancements, and semiconducting oxides. As AI continues to transform every aspect of human existence, it enhances people’s daily lives by driving efficiency, enabling smarter decision-making, and fostering unprecedented innovation across industries.
Further, TSMC described its next generation transistor technology for their N2, or 2-nanometer, technology which is the semiconductor foundry giant’s first foray into a new transistor architecture, called nanosheet or gate-all-around.
Samsung has a process for manufacturing similar devices, and both Intel and TSMC expect to be producing them in 2025.
Compared to TSMC’s most advanced process today, N3 (3-nanometer), the new technology offers up to a 15 percent speed up or as much as 30 percent better energy efficiency, while increasing density by 15 percent.
N2 is “the fruit of more than four years of labor,” Geoffrey Yeap, TSMC vice president of R&D and advanced technology told engineers at IEDM. Today’s transistor, the FinFET, has a vertical fin of silicon at its heart. Nanosheet or gate-all-around transistors have a stack of narrow ribbons of silicon instead.
The difference not only provides better control of the flow of current through the device, it also allows engineers to produce a larger variety of devices, by making wider or narrower nanosheets. FinFETs could only provide that variety by multiplying the number of fins in a device—such as a device with one or two or three fins. But nanosheets give designers the option of gradations in between those, such as the equivalent of 1.5 fins or whatever might suit a particular logic circuit better.
Called Nanoflex, TSMC’s tech allows different logic cells built with different nanosheetwidths on the same chip. Logic cells made from narrow devices might make up general logic on the chip, while those with broader nanosheets, capable of driving more current and switching faster, would make up the CPU cores.
TSMC A16 technology is the next nanosheet-based technology featuring Super Power Rail, or SPR.
SPR is an innovative, best-in-class backside power delivery solution. It improves logic density and performance by dedicating front-side routing resource to signals. SPR also improves power delivery and reduces IR drop significantly. Most importantly, the novel backside contact scheme we developed preserves gate density, layout footprint, and device width flexibility, thus achieving best density and performance simultaneously, and we believe it is a first in the industry.
TSMC's N2 has brought a modest rise in capabilities, especially when you compare it up against 3nm and its derivatives. This is why the 2nm process is said to witness massive adoption from industry giants such as Apple and NVIDIA, given the process's generational improvements.
A Breakthrough Announcement from NVIDIA + TSMC
On another note, NVIDIA has positively predicted the future of silicon photonics while presenting its AI GPU technology at the world's leading semiconductor conference, IEDM 2024, held in the United States on Dec. 7. During the conference, NVIDIA showcased a silicon photonics prototype developed in collaboration with TSMC.
An industry insider commented on the significance of this technology, stating, "It is hundreds of times faster than the existing method where data moves through metals like copper." This speed advantage is crucial for data-intensive applications such as AI data centers, where efficient data transfer is paramount. For more on Nvidia/TSMC news, read the full report by BusinessKorea.