Back in June 2021, Patently Apple posted a report titled "TSMC's 3DFabric Technology is the next big wave in Chip Design that Apple will take advantage of in the not-too-distant Future." This technology has been gaining popularity, especially due to AI chips in such high demand. In July 2023 we posted another report on this subject matter titled "Apple is reportedly testing 3D Fabric Technology as TSMC plans to mass produce 3D Chip stacking packaging by 2027 for Apple and others." Over the weekend we posted a report on this titled " Industry Trends: 3D Chip Stacking Technology and the Revolutionary switch to Glass Substrates."

Apple is also working on this technology related to 3D chip stacking and packaging as a new patent application reveals – that even touches on the use of glass substrates.

Today the U.S. Patent and Trademark Office officially published a patent application from Apple that relates to packaging technology, and more specifically to a thin system-in-package with a shielded stepped mold that could be used in MacBooks, the iPhone, iPad, Apple Watch and more

Thin System-in-Package with Shielded Stepped Mold

Apple's invention relates to a first system-in-package for an electronic device with a reduced thickness. The first system-in-package includes a stepped mold, an insulation film substrate connected to a multi-layer board via a first plurality of connectors, at least one processor die integrated into the stepped mold and stacked onto the insulation film substrate via a second plurality of connectors, and at least one passive element integrated into the stepped mold and stacked onto the insulation film substrate.

Embodiments of the present disclosure are further directed to a second system-in-package for an electronic device with a reduced thickness. The second system-in-package includes a stepped mold, an insulation film substrate connected to a multi-layer board via a first plurality of connectors, at least one processor die and at least one of a radio frequency front-end die and a power control die integrated into the stepped mold and stacked onto the insulation film substrate via a second plurality of connectors, and a plurality of passive elements of different heights integrated into the stepped mold and stacked onto the insulation film substrate.

Embodiments of the present disclosure are further directed to a third system-in-package for an electronic device with a reduced thickness. The third system-in-package includes a stepped mold, a multi-layer board, an insulation film substrate connected to the multi-layer board via a first plurality of connectors, at least one processor die integrated into the stepped mold and stacked onto the insulation film substrate via a second plurality of connectors, and a plurality of passive elements integrated into the stepped mold and stacked onto the insulation film substrate, one of the plurality of passive elements is staked onto the insulation film substrate via a third plurality of connectors placed within a recess of the insulation film substrate.

Apple's patent FIGS. 1A-F below represents the devices that Apple states could take advantage of this 'system-in-package.

Apple's patent FIG. 2 below is a schematic diagram of a system-in-package #200 of electronic device #100 of FIG. 1A. Although the depicted embodiment shows multiple panels on different sides and on the same layer of the electronic device, the systems described in Apple's patent application can also apply to stacked panels, such as a three-dimensional (3D) stack of printed circuit boards. That is, one or more of the panels may be positioned on top of or beneath one or more other panels. In the depicted embodiment, system-in-package includes packaging for a front glass panel #232 (e.g., front surface panel or cover glass panel), a main logic board #233 with a back glass panel #234, a left side panel #236, and a right side panel #238.

Apple's patent FIG. 8 above is a schematic diagram of a system-in-package #800 that may be integrated into electronic device #100, according to one embodiment. System-in-package 800 may be a system-in-package integrated into front glass panel #232, main logic board #233, back glass panel #234, left side panel #236, or right side panel #238. The system-in-package may include at least one processor die #802, first passive elements #804, at least one radio frequency front-end die #806, at least one power control die #808, a second passive element #810, a third passive element #812, a stepped mold #818, and an insulation film substrate #820.

To review the full details of this invention, check out patent application 20240243113.